知ってそうで知らない為になる話-其の19
みなさんこんにちは．525です．
今回はみなさんも気になっているであろうVHDLでの信号機の回路設計についてかきたいなと思います．詳しくは察してください．
分周器
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
--分周器entity divider is
--パラメタライズ
generic
(
N_CNT : integer := 100
);
port
(
Clock : in std_logic;
OUT_CLK : out std_logic
);
end divider;
architecture RTL of divider is
--内部信号の定義signal CNT : integer range 0 to N_CNT + 1 := 0;
signal OUT_TMP : std_logic;
beginprocess(Clock)
begin
if (Clock'event and Clock='1') then
if(CNT = N_CNT) then
CNT <= 0;
OUT_TMP <= '0';
elsif(CNT = N_CNT / 2) then--
CNT <= CNT + 1;
OUT_TMP <= '1';
else
CNT <= CNT + 1;
end if;
end if;
end process;
OUT_CLK <= OUT_TMP;
end RTL;
カウンタ
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
--カウンタentity count_n_int is
generic
(
N : integer := 8
);
port
(
Clock : in std_logic;
RST : in std_logic;
COUNT_N : out integer range 0 to N
);
end count_n_int;
architecture RTL of count_n_int is
signal COUNT_TMP : integer range 0 to N := 0;
beginprocess(Clock)
begin
if(Clock'event and Clock = '1')then
if(COUNT_TMP = N) then
COUNT_TMP <= 0;
else
COUNT_TMP <= COUNT_TMP + 1;
end if;
end if;
if(RST = '0') then
COUNT_TMP <= 0;
else
null;
end if;
end process;
COUNT_N <= COUNT_TMP;
end RTL;
ステートマシン
library IEEE;
use IEEE.std_logic_1164.all;
entity stateMachine_ex isport
(
Clock : in std_logic;
Reset : in std_logic;
COUNT_KEY: in integer range 0 to 13;
control : out integer range 0 to 9
);
end stateMachine_ex;
architecture RTL of stateMachine_ex is
--内部信号の定義type LED_STATE is (S1, S2, S3, S4, S5, S6, S7, S8, S9, S10);
signal crnt_state: LED_STATE := S1;--現在の状態
signal nxt_state: LED_STATE := S1;--次の状態
signal controls : integer range 0 to 9 := 0;
begin--現在の状態に次の状態を格納する
process(Clock,nxt_state)
begin
if (Clock'event and Clock = '1') then
crnt_state <= nxt_state;
else
null;
end if;
end process;
--次の状態を決定するprocess(crnt_state,COUNT_KEY,Reset)
begin
case crnt_state is
when S1 =>
if(COUNT_KEY = 1) then
nxt_state <= S2;
else
nxt_state <= S1;
end if;
controls <= 0;
when S2 =>
if(COUNT_KEY = 3) then
nxt_state <= S3;
else
nxt_state <= S2;
end if;
controls <= 1;
when S3 =>
if(COUNT_KEY = 4) then
nxt_state <= S4;
else
nxt_state <= S3;
end if;
controls <= 2;
when S4 =>
if(COUNT_KEY = 5) then
nxt_state <= S5;
else
nxt_state <= S4;
end if;
controls <= 3;
when S5 =>
if(COUNT_KEY = 6) then
nxt_state <= S6;
else
nxt_state <= S5;
end if;
controls <= 4;
when S6 =>
if(COUNT_KEY = 7) then
nxt_state <= S7;
else
nxt_state <= S6;
end if;
controls <= 5;
when S7 =>
if(COUNT_KEY = 11) then
nxt_state <= S8;
else nxt_state <= S7;
end if;
controls <= 6;
when S8 =>
if(COUNT_KEY = 12) then
nxt_state <= S9;
else
nxt_state <= S8;
end if;
controls <= 7;
when S9 =>
if(COUNT_KEY = 13) then
nxt_state <= S10;
else
nxt_state <= S9;
end if;
controls <= 8;
when S10 =>
if(COUNT_KEY = 0) then
nxt_state <= S1;
else
nxt_state <= S10;
end if;
controls <= 9;
when others => null;
end case;
if(Reset = '0') then
controls <= 0;
nxt_state <= S1;
else
null;
end if;
end process;
--出力control <= controls;
end RTL;
LED出力結果
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity controlLED_ex isport
(
control : in integer range 0 to 9; --入力の状態
Clock : in std_logic; --点滅用
LEDG : out std_logic_vector(9 downto 0) --出力信号
);
end controlLED_ex;
architecture RTL of controlLED_ex is
signal LED : std_logic_vector(9 downto 0) := "0101001001";signal C1_CNT : std_logic; --
component divider is
generic
(
N_CNT : integer := 100
);
port
(
Clock : in std_logic;
OUT_CLK : out std_logic
);
end component;
beginC1 : divider
generic map(N_CNT => 5000) --1/10秒にする
port map
(
Clock => Clock,
OUT_CLK => C1_CNT
); --各状態の出力を代入
process(control)
begin
if(control = 0) then
LED <= "0101001001";
elsif(control = 1) then
LED <= "1001100001";
elsif(control = 2) then --点滅
LED <= "0001100001";
LED(9) <= C1_CNT;
elsif(control = 3) then
LED <= "0101100001";
elsif(control = 4) then
LED <= "0101010001";
elsif(control = 5) then
LED <= "0101001001";
elsif(control = 6) then
LED <= "0110001100";
elsif(control = 7) then --点滅
LED <= "0110001100";
LED(7) <= C1_CNT;
elsif(control = 8) then
LED <= "0101001100";
elsif(control = 9) then
LED <= "0101001010";
else
LED <= "1111000000"; --デバッグ用
end if;
end process;
LEDG <= LED;end RTL;
main文
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
--拡張版entity signal_test_ex is
port
(
Clock : in std_logic;
Reset : in std_logic;
Light4Car_NS : out std_logic_vector(2 downto 0); -- 2-0
Light4Car_EW : out std_logic_vector(2 downto 0); -- 5-3
Light4Hum_NS : out std_logic_vector(1 downto 0); -- 7-6
Light4Hum_EW : out std_logic_vector(1 downto 0) -- 9-8
)
;end signal_test_ex;
architecture RTL of signal_test_ex is
--各種コンポーネント定義--分周器
component divider is
generic
(
N_CNT : integer := 100
);
port
(
Clock : in std_logic;
OUT_CLK : out std_logic
);
end component;
--カウンタcomponent count_n_int is
generic
(
N : integer := 8
);
port
(
Clock : in std_logic;
RST : in std_logic;
COUNT_N : out integer range 0 to N
);
end component;
--ステートマシンcomponent stateMachine_ex is
port
(
Clock : in std_logic;
Reset : in std_logic;
COUNT_KEY: in integer range 0 to 13;
control : out integer range 0 to 9
);
end component;
--LED出力設定component controlLED_ex is
port
(
control : in integer range 0 to 9;
Clock : in std_logic;
LEDG : out std_logic_vector( 9 downto 0 )
);
end component;
--各モジュールの出力結果を代入する内部信号の生成signal C1_CNT : std_logic;
signal C2_CNT : std_logic;
signal C3_CNT : integer range 0 to 13;
signal C4_CNT : integer range 0 to 9;
signal C5_CNT : std_logic_vector(9 downto 0);
begin
C1 : dividergeneric map(N_CNT => 1000)
port map
(
Clock => Clock,
OUT_CLK => C1_CNT
);
C2 : dividergeneric map(N_CNT => 50000)
port map
(
Clock => C1_CNT,
OUT_CLK => C2_CNT
);
C3 : count_n_int
generic map(N => 13)
port map
(
Clock => C2_CNT,
RST => Reset,
COUNT_N => C3_CNT
);
C4 : stateMachine_ex
port map
(
Clock => Clock,
Reset => Reset,
COUNT_KEY => C3_CNT,
control => C4_CNT
);
C5 : controlLED_ex
port map
(
control => C4_CNT,
Clock => C1_CNT,
LEDG => C5_CNT
);
Light4Car_NS(0) <= C5_CNT(0);
Light4Car_NS(1) <= C5_CNT(1);
Light4Car_NS(2) <= C5_CNT(2);
Light4Car_EW(0) <= C5_CNT(3);
Light4Car_EW(1) <= C5_CNT(4);
Light4Car_EW(2) <= C5_CNT(5);
Light4Hum_NS(0) <= C5_CNT(6);
Light4Hum_NS(1) <= C5_CNT(7);
Light4Hum_EW(0) <= C5_CNT(8);
Light4Hum_EW(1) <= C5_CNT(9);
end RTL;
まとめ
何とはいいませんが参考にしてみてください．
ここまで読んでいただきありがとうございます！
明日の日報ぶりゅりもお楽しみに！525.
